The CPU and the fetch–decode–execute cycle
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课程笔记
The CPU and the Fetch–Decode–Execute Cycle
- The CPU (central processing unit) is the processor that follows the fetch–decode–execute cycle from boot-up until shutdown.
- The cycle has three main stages: fetch, decode, and execute.
- Instructions and data are both held in memory as binary.
- In simpler CPUs, instructions are processed sequentially; in modern CPUs, they are often processed concurrently via an instruction pipeline.
Key Registers
- Program counter (PC): holds the memory address of the next instruction to be executed.
- Memory address register (MAR): stores the address of the instruction or data to be accessed.
- Memory data register (MDR): temporarily holds data read from or written to memory.
- Current instruction register (CIR): holds the current instruction while it is decoded.
The program counter, MAR, MDR, current instruction register and accumulator each hold one specific thing.
Control Unit and ALU
- The control unit (CU) decodes the instruction in the CIR and sends control signals to other components.
- The arithmetic logic unit (ALU) performs arithmetic and logical operations based on the instruction's opcode.
- The CU may also signal the floating-point unit (FPU) for floating-point operations.
The control unit, ALU, registers and clock work together inside the CPU, connected by data and control paths.
Fetch Stage
- The PC contains the address of the next instruction.
- That address is copied to the MAR.
- The CU sends a read signal; the instruction is placed on the data bus and loaded into the MDR.
- The PC is incremented to point to the next instruction.
- The instruction is copied from the MDR to the CIR.
Decode Stage
- The CU interprets the instruction in the CIR.
- It determines what operation is required and what operands are needed.
- The opcode is decoded, often by binary decoders in the CU.
- Signals are sent to the ALU, FPU, or memory to prepare for execution.
Execute Stage
- The actual operation is carried out by the relevant functional units.
- The ALU may perform arithmetic or logical operations.
- Data may be read from or written to memory.
- Results are stored in registers or memory as required.
- Based on the ALU output, the PC may branch to a different address.
Interrupts and Booting
- Interrupts can cause the CPU to jump to an interrupt service routine, then return to the original instruction.
- The first instruction cycle begins when power is applied, with an initial PC value predefined by the architecture.
- This address typically points to read-only memory (ROM) containing boot instructions.
- This starts the process of loading the operating system.
Clock Speed and Cores
- Clock speed (measured in hertz) indicates how many cycles the CPU can execute per second.
- A higher clock speed generally means faster processing.
- Cores are independent processing units within a single CPU.
- Multiple cores allow the CPU to execute multiple instructions in parallel.
Each clock pulse advances the CPU one step, so a full fetch-decode-execute cycle completes one instruction.
The CPU repeats fetch, decode and execute for every instruction.
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练习题
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1.The CPU follows the fetch-decode-execute cycle from boot-up until the computer is shut down.
EasyTrue or false?
2.In the fetch stage, the program counter is incremented after the instruction is copied to the current instruction register.
EasyTrue or false?
3.Which component of the CPU decodes the instruction in the current instruction register?
Easy- AArithmetic logic unit (ALU)
- BControl unit (CU)
- CMemory data register (MDR)
- DProgram counter (PC)
4.In modern CPUs, instructions are often processed concurrently using a pipeline.
EasyTrue or false?
5.During which stage does the control unit interpret the instruction and determine what operations are required?
Medium- AFetch
- BDecode
- CExecute
- DInterrupt
6.The memory address register (MAR) holds the actual data of the instruction, not the address.
EasyTrue or false?
7.What happens to the program counter at the end of the fetch stage?
Medium- AIt is reset to zero
- BIt points to the next instruction to be read
- CIt is incremented by two
- DIt is stored in the memory data register
8.During the execute stage, the program counter may be updated based on the result of an operation in the ALU.
EasyTrue or false?
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